Differences
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| Both sides previous revisionPrevious revision | Last revisionBoth sides next revision | ||
| en:docs:macrolib:auxrecievechar [2022/04/16 13:01] – prokushev | en:docs:macrolib:auxrecievechar [2022/04/16 15:12] – prokushev | ||
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| * AH bit 7 clear if successful | * AH bit 7 clear if successful | ||
| * AH bit 7 set on error | * AH bit 7 set on error | ||
| - | * AH bits 6-0 = port status (see #00304) | + | * AH bits 6-0 = port status: |
| + | |||
| + | ^ Bit(s) ^ Description ^ | ||
| + | | 7 | timeout | | ||
| + | | 6 | transmit shift register empty | | ||
| + | | 5 | transmit holding register empty | | ||
| + | | 4 | break detected | | ||
| + | | 3 | framing error | | ||
| + | | 2 | parity error | | ||
| + | | 1 | overrun error | | ||
| + | | 0 | receive data ready | | ||